This collection contains detailed microarchitectural simulations of several thousand CPU cores. Results come from the gem5 cycle-accurate simulator (http://gem5.org) and the McPAT power model (https://code.google.com/archive/p/mcpat/). A number of single-threaded benchmarks have been simulated.

Items in this Collection

  • EEMBC FPMark Benchmark Suite Simulations 

    Tomusk, Erik
    This dataset contains gem5 simulation results and McPAT power consumption figures for 3000 out-of-order CPU cores running EEMBC FPMark benchmarks. The benchmarks have been compiled for the ARM ISA and have been simulated ...
  • SPEC 2006 Integer Benchmark Suite Simulations 

    Tomusk, Erik
    This dataset contains gem5 simulation results and McPAT power consumption figures for 3000 out-of-order CPU cores running SPEC 2006 integer benchmarks. The benchmarks have been compiled for the ARM ISA and have been simulated ...
  • EEMBC Benchmark Suite Simulations 

    Tomusk, Erik
    This dataset contains gem5 simulation results and McPAT power consumption figures for 3000 out-of-order CPU cores running EEMBC DENBench (digital entertainment) and Networking 2.0 benchmarks. The benchmarks have been ...